1. Field of the Invention
The invention relates generally to a method of manufacturing a transistor in a semiconductor device. More particularly, the present invention relates to a method of manufacturing a transistor in a semiconductor device by which, when forming an elevated channel using an epitaxy technology for further expanding the applied region of a buried channel PMOS transistor, indium ions having the high amount of atoms and a low diffusion speed after growth of an epitaxial layer are implanted to distribute them into a boron epitaxial layer and a lower portion. Thus, it can obtain a desired threshold voltage (Vt) in a device and can improve degradation in a short channel.
2. Description of the Prior Art
Generally, in order for the applied region of the buried channel PMOS transistor to be expanded further, a transistor of a semiconductor device having an elevated channel is employed using an epitaxy technology.
FIGS. 1A through 1C are sectional views for illustrating a method of manufacturing a transistor in a conventional semiconductor device.
Referring now to FIG. 1A, a device separation film 2 is formed on a silicon substrate 1, and an N-well 3 is formed on it in order to form a PMOS transistor.
Referring to FIG. 1B, an epitaxial layer 4 into which boron is doped, is formed only at the portion in which the silicon substrate 1 is exposed using selective epi-silicon growth (SEG) process. Then, a gate oxide film 5, a gate electrode 6 and a mask insulating film 7 are sequentially formed on the epitaxial layer 4 in a stacked pattern.
Referring to FIG. 1C, a gate spacer 8 is formed at both sides of the pattern in which the gate electrode 6 is included. Next, source/drain ion implantation process and annealing process for activating implanted dopents are sequentially performed to form a source/drain junction 9, thus defining a boron-doped channel epitaxial layer 4a under the gate electrode 6.
As mentioned above, as the conventional boron-doped channel epitaxial layer 4a requires consumption of the silicon substrate 1 when forming the gate oxide film 5, the channel epitaxial layer 4a is consumed about 30 Angstrom. Also, as loss of boron into the gate oxide film 5 is occurred, a doping profile similar to a square shape initially is gradually formed at the interface with the gate oxide film 5. However, in order to prevent it, if the thickness of the gate oxide film 5 becomes thicker, the portion in which the channel is formed becomes deeper. Also, in order to compensate for this loss of boron, if the doping concentration becomes higher exceeding a desired level, a capture phenomenon of channel boron is strongly occurred around the crystal defects of dislocation etc. that is necessarily formed when implanting ions at a higher concentration for forming the junction of the device. As well known in the art. Thus, it causes a problem that the phenomenon of degrading the threshold voltage (Vt) characteristic in the device such as a reverse short channel effect is significant toward the short channel.
It is therefore an object of the present invention to provide a method of manufacturing a transistor in a semiconductor device by which, when forming an elevated channel using an epitaxy technology for further expanding the applied region of a buried channel PMOS transistor, indium ions having the high mount of atoms and a low diffusion speed after growth of an epitaxial layer are implanted to distribute them into a boron epitaxial layer and a lower portion. Thus, it can obtain a desired threshold voltage (Vt) in a device and can improve degradation in a short channel.
A method of manufacturing a transistor in a semiconductor device according to the present invention is characterized in that it comprises the step of forming a device separation film on a silicon substrate and then forming a N-well; after performing cleaning process, forming an epitaxial layer in which boron is selectively doped only into the portion in which said silicon substrate is exposed; implanting indium ions into said epitaxial layer to form a boron-indium doped epitaxial layer; forming a pattern in which a gate oxide film, a gate electrode and a mask insulating film are stacked on said boron-indium doped epitaxial layer; and forming a gate spacer at both sides of the pattern in which said gate electrode is included, and then sequentially performing source/drain ion implantation process and annealing process for activating the implanted dopents.